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Commit 921d6eb2 authored by sharma53's avatar sharma53
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adding l2 to mcu write interactions in l2_proto_mon

parent 91b54e16
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monitors/other_monitors/l2_proto_mon.v
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......@@ -300,53 +300,53 @@ wire [27:0] mcu3_l2b7_ecc_r2 = `L2B7.mcu_l2b_ecc_r2;
wire l2t0_mcu0_wr_req = `L2T0.l2t_mcu_wr_req;
wire [39:7] l2t0_mcu0_addr = `L2T0.l2t_mcu_addr;
wire mcu0_l2t0_rd_ack = `L2T0.mcu_l2t_rd_ack;
wire mcu0_l2t0_wr_ack = `L2T0.mcu_l2t_wr_ack;
wire l2b0_mcu0_data_vld_r5 = `L2B0.evict_l2b_mcu_data_vld_r5;
wire [63:0] l2b0_mcu0_wr_data_r5 = `L2B0.evict_l2b_mcu_wr_data_r5;
wire l2t1_mcu0_wr_req = `L2T1.l2t_mcu_wr_req;
wire [39:7] l2t1_mcu0_addr = `L2T1.l2t_mcu_addr;
wire mcu0_l2t1_rd_ack = `L2T1.mcu_l2t_rd_ack;
wire mcu0_l2t1_wr_ack = `L2T1.mcu_l2t_wr_ack;
wire l2b1_mcu0_data_vld_r5 = `L2B1.evict_l2b_mcu_data_vld_r5;
wire [63:0] l2b1_mcu0_wr_data_r5 = `L2B1.evict_l2b_mcu_wr_data_r5;
wire l2t2_mcu1_wr_req = `L2T2.l2t_mcu_wr_req;
wire [39:7] l2t2_mcu1_addr = `L2T2.l2t_mcu_addr;
wire mcu1_l2t2_rd_ack = `L2T2.mcu_l2t_rd_ack;
wire mcu1_l2t2_wr_ack = `L2T2.mcu_l2t_wr_ack;
wire l2b2_mcu1_data_vld_r5 = `L2B2.evict_l2b_mcu_data_vld_r5;
wire [63:0] l2b2_mcu1_wr_data_r5 = `L2B2.evict_l2b_mcu_wr_data_r5;
wire l2t3_mcu1_wr_req = `L2T3.l2t_mcu_wr_req;
wire [39:7] l2t3_mcu1_addr = `L2T3.l2t_mcu_addr;
wire mcu1_l2t3_rd_ack = `L2T3.mcu_l2t_rd_ack;
wire mcu1_l2t3_wr_ack = `L2T3.mcu_l2t_wr_ack;
wire l2b3_mcu1_data_vld_r5 = `L2B3.evict_l2b_mcu_data_vld_r5;
wire [63:0] l2b3_mcu1_wr_data_r5 = `L2B3.evict_l2b_mcu_wr_data_r5;
wire l2t4_mcu2_wr_req = `L2T4.l2t_mcu_wr_req;
wire [39:7] l2t4_mcu2_addr = `L2T4.l2t_mcu_addr;
wire mcu2_l2t4_rd_ack = `L2T4.mcu_l2t_rd_ack;
wire mcu2_l2t4_wr_ack = `L2T4.mcu_l2t_wr_ack;
wire l2b4_mcu2_data_vld_r5 = `L2B4.evict_l2b_mcu_data_vld_r5;
wire [63:0] l2b4_mcu2_wr_data_r5 = `L2B4.evict_l2b_mcu_wr_data_r5;
wire l2t5_mcu2_wr_req = `L2T5.l2t_mcu_wr_req;
wire [39:7] l2t5_mcu2_addr = `L2T5.l2t_mcu_addr;
wire mcu2_l2t5_rd_ack = `L2T5.mcu_l2t_rd_ack;
wire mcu2_l2t5_wr_ack = `L2T5.mcu_l2t_wr_ack;
wire l2b5_mcu2_data_vld_r5 = `L2B5.evict_l2b_mcu_data_vld_r5;
wire [63:0] l2b5_mcu2_wr_data_r5 = `L2B5.evict_l2b_mcu_wr_data_r5;
wire l2t6_mcu3_wr_req = `L2T6.l2t_mcu_wr_req;
wire [39:7] l2t6_mcu3_addr = `L2T6.l2t_mcu_addr;
wire mcu3_l2t6_rd_ack = `L2T6.mcu_l2t_rd_ack;
wire mcu3_l2t6_wr_ack = `L2T6.mcu_l2t_wr_ack;
wire l2b6_mcu3_data_vld_r5 = `L2B6.evict_l2b_mcu_data_vld_r5;
wire [63:0] l2b6_mcu3_wr_data_r5 = `L2B6.evict_l2b_mcu_wr_data_r5;
wire l2t7_mcu3_wr_req = `L2T7.l2t_mcu_wr_req;
wire [39:7] l2t7_mcu3_addr = `L2T7.l2t_mcu_addr;
wire mcu3_l2t7_rd_ack = `L2T7.mcu_l2t_rd_ack;
wire mcu3_l2t7_wr_ack = `L2T7.mcu_l2t_wr_ack;
wire l2b7_mcu3_data_vld_r5 = `L2B7.evict_l2b_mcu_data_vld_r5;
wire [63:0] l2b7_mcu3_wr_data_r5 = `L2B7.evict_l2b_mcu_wr_data_r5;
/* Section 3.4.1 Manual Vol 1 */
/* Section 3.4.1 and 3.4.2 Manual Vol 1 */
/* L2 to MCU Read Request */
always @(posedge (cmp_clk && enabled))
......@@ -555,4 +555,229 @@ begin
end
/* L2 to MCU Write Request */
always @(posedge (cmp_clk && enabled))
begin
if(l2t0_mcu0_wr_req)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2T0 Write Request to MCU0");
`PR_INFO("l2_proto_mon", `INFO, "L2T0 to MCU0 Write Request Address = %x", l2t0_mcu0_addr);
end
end
always @(posedge (cmp_clk && enabled))
begin
if(l2t1_mcu0_wr_req)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2T1 Write Request to MCU0");
`PR_INFO("l2_proto_mon", `INFO, "L2T1 to MCU0 Write Request Address = %x", l2t1_mcu0_addr);
end
end
always @(posedge (cmp_clk && enabled))
begin
if(l2t2_mcu1_wr_req)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2T2 Write Request to MCU1");
`PR_INFO("l2_proto_mon", `INFO, "L2T2 to MCU1 Write Request Address = %x", l2t2_mcu1_addr);
end
end
always @(posedge (cmp_clk && enabled))
begin
if(l2t3_mcu1_wr_req)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2T3 Write Request to MCU1");
`PR_INFO("l2_proto_mon", `INFO, "L2T3 to MCU1 Write Request Address = %x", l2t3_mcu1_addr);
end
end
always @(posedge (cmp_clk && enabled))
begin
if(l2t4_mcu2_wr_req)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2T4 Write Request to MCU2");
`PR_INFO("l2_proto_mon", `INFO, "L2T4 to MCU2 Write Request Address = %x", l2t4_mcu2_addr);
end
end
always @(posedge (cmp_clk && enabled))
begin
if(l2t5_mcu2_wr_req)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2T5 Write Request to MCU2");
`PR_INFO("l2_proto_mon", `INFO, "L2T5 to MCU2 Write Request Address = %x", l2t5_mcu2_addr);
end
end
always @(posedge (cmp_clk && enabled))
begin
if(l2t6_mcu3_wr_req)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2T6 Write Request to MCU3");
`PR_INFO("l2_proto_mon", `INFO, "L2T6 to MCU3 Write Request Address = %x", l2t6_mcu3_addr);
end
end
always @(posedge (cmp_clk && enabled))
begin
if(l2t7_mcu3_wr_req)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2T7 Write Request to MCU3");
`PR_INFO("l2_proto_mon", `INFO, "L2T7 to MCU3 Write Request Address = %x", l2t7_mcu3_addr);
end
end
/* MCU to L2 Write Request Acknowledgement */
always @(posedge (cmp_clk && enabled))
begin
if(mcu0_l2t0_wr_ack)
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "MCU0 to L2T0 Write Request Acknowledgement");
end
always @(posedge (cmp_clk && enabled))
begin
if(mcu0_l2t1_wr_ack)
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "MCU0 to L2T1 Write Request Acknowledgement");
end
always @(posedge (cmp_clk && enabled))
begin
if(mcu1_l2t2_wr_ack)
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "MCU1 to L2T2 Write Request Acknowledgement");
end
always @(posedge (cmp_clk && enabled))
begin
if(mcu1_l2t3_wr_ack)
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "MCU1 to L2T3 Write Request Acknowledgement");
end
always @(posedge (cmp_clk && enabled))
begin
if(mcu2_l2t4_wr_ack)
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "MCU2 to L2T4 Write Request Acknowledgement");
end
always @(posedge (cmp_clk && enabled))
begin
if(mcu2_l2t5_wr_ack)
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "MCU2 to L2T5 Write Request Acknowledgement");
end
always @(posedge (cmp_clk && enabled))
begin
if(mcu3_l2t6_wr_ack)
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "MCU3 to L2T6 Write Request Acknowledgement");
end
always @(posedge (cmp_clk && enabled))
begin
if(mcu3_l2t7_wr_ack)
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "MCU3 to L2T7 Write Request Acknowledgement");
end
/* L2 to MCU Write Rquest Data */
always @(posedge (cmp_clk && enabled))
begin
if(l2b0_mcu0_data_vld_r5)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2B0 to MCU0 Write Data Being Sent");
repeat (8) @(posedge cmp_clk)
begin
`PR_INFO("l2_proto_mon", `INFO, "L2B0 to MCU0 Write Data = %x", l2b0_mcu0_wr_data_r5);
end
end
end
always @(posedge (cmp_clk && enabled))
begin
if(l2b1_mcu0_data_vld_r5)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2B1 to MCU0 Write Data Being Sent");
repeat (8) @(posedge cmp_clk)
begin
`PR_INFO("l2_proto_mon", `INFO, "L2B1 to MCU0 Write Data = %x", l2b1_mcu0_wr_data_r5);
end
end
end
always @(posedge (cmp_clk && enabled))
begin
if(l2b2_mcu1_data_vld_r5)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2B2 to MCU1 Write Data Being Sent");
repeat (8) @(posedge cmp_clk)
begin
`PR_INFO("l2_proto_mon", `INFO, "L2B2 to MCU1 Write Data = %x", l2b2_mcu1_wr_data_r5);
end
end
end
always @(posedge (cmp_clk && enabled))
begin
if(l2b3_mcu1_data_vld_r5)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2B3 to MCU1 Write Data Being Sent");
repeat (8) @(posedge cmp_clk)
begin
`PR_INFO("l2_proto_mon", `INFO, "L2B3 to MCU1 Write Data = %x", l2b3_mcu1_wr_data_r5);
end
end
end
always @(posedge (cmp_clk && enabled))
begin
if(l2b4_mcu2_data_vld_r5)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2B4 to MCU2 Write Data Being Sent");
repeat (8) @(posedge cmp_clk)
begin
`PR_INFO("l2_proto_mon", `INFO, "L2B4 to MCU2 Write Data = %x", l2b4_mcu2_wr_data_r5);
end
end
end
always @(posedge (cmp_clk && enabled))
begin
if(l2b5_mcu2_data_vld_r5)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2B5 to MCU2 Write Data Being Sent");
repeat (8) @(posedge cmp_clk)
begin
`PR_INFO("l2_proto_mon", `INFO, "L2B5 to MCU2 Write Data = %x", l2b5_mcu2_wr_data_r5);
end
end
end
always @(posedge (cmp_clk && enabled))
begin
if(l2b6_mcu3_data_vld_r5)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2B6 to MCU3 Write Data Being Sent");
repeat (8) @(posedge cmp_clk)
begin
`PR_INFO("l2_proto_mon", `INFO, "L2B6 to MCU3 Write Data = %x", l2b6_mcu3_wr_data_r5);
end
end
end
always @(posedge (cmp_clk && enabled))
begin
if(l2b7_mcu3_data_vld_r5)
begin
`PR_ALWAYS("l2_proto_mon", `ALWAYS, "L2B7 to MCU3 Write Data Being Sent");
repeat (8) @(posedge cmp_clk)
begin
`PR_INFO("l2_proto_mon", `INFO, "L2B7 to MCU3 Write Data = %x", l2b7_mcu3_wr_data_r5);
end
end
end
endmodule
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