Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
H
hpvm-release
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Model registry
Operate
Environments
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
llvm
hpvm-release
Repository graph
Repository graph
You can move around the graph by using the arrow keys.
4a8ec7e7fc5329d8b088d1997ef9d3e89fccdcdd
Select Git revision
Branches
3
hpvm-release-epochs
hpvm-release-epochs0
main
default
Tags
4
v2.0
v2.0rc
v1.0
v0.5
7 results
Begin with the selected commit
Created with Raphaël 2.2.0
26
Apr
23
5
21
Mar
20
19
18
17
16
15
13
12
11
9
8
7
5
4
3
2
27
Feb
16
15
9
8
3
Dec
19
Nov
18
9
7
4
27
Oct
16
Sep
12
11
10
9
8
7
6
5
4
2
1
31
Aug
23
18
15
5
4
2
1
30
Jul
26
21
20
16
14
9
2
30
Jun
22
20
18
14
13
11
5
3
2
29
May
20
13
12
4
3
2
1
29
Apr
10
9
27
Mar
12
9
8
7
6
4
2
1
27
Feb
26
23
14
13
12
11
10
9
6
4
1
30
Jan
28
27
17
Dec
16
5
4
30
Nov
29
27
26
25
24
21
19
18
17
16
14
11
9
6
5
4
3
31
Oct
30
19
16
12
7
11
Sep
4
13
Aug
12
11
10
6
5
4
3
2
1
31
Jul
30
29
26
23
15
10
8
7
27
Jun
3
22
May
24
Apr
17
14
3
Oct
20
Sep
1
Aug
4
Jul
3
2
30
Jun
28
26
25
13
Fixed pipeline benchmark to not specify return types of internal nodes. That is automatically inferred from bind out intrinsics
Changed GenVISC pass to automatically infer return type of internal nodes from bind output intrinsics
Fixed linera-svm conflict
linear-svm example committed to compute memory branch
No internal nodes for linear-svm. Using just vector ops
Fixed pipeline code. Allows multiple runs within the code. Fixed visc.mk to support SPIR and PTX both
Removed bugs in hint generation. Earlier non-gpu hints were all considered sequential cpu.
Made visc-rt threadsafe by implementing locks across all ocl functions. Very crude. Fine grained locking possible if performance deteriotes
linear-svm example committed to compute memory branch
moved spmv to c++. Required for dummy visc calls
fixed lbm hint in visc
fixed hint in stencil visc
Commiting the pipeline version of pldi
Modified visc-rt to not create a thread for launch. Improves results for vector case
Ported bfs to cpu baseline
Ported cutcp for cpu_baseline version
Merge branch 'master' of bitbucket.org:psrivas2/visc
Ported histo for opencl cpu
Stencil vector baseline
Merge branch 'master' of bitbucket.org:psrivas2/visc
visc.mk changes missing in previous commit
Now we do not need to edit the visc hint for the 5 new benchmarks, to compile them for avx or gpu
Ported opencl_base for avx platform
Sgemm opencl cpu nvidia version (in opencn_cpu_sm)
opencl_base version of tpacf with dynamic shared memory allocation
bfs working for avx backend
cutcp working for avx backend
Fixed a bug in SPIR backend to generate get_num_groups correctly
Merge branch 'master' of bitbucket.org:psrivas2/visc
(1) sgemm visc_sh working for vector backend
Added unsigned min-max atomics
Added support for umin and umax visc intrinsics
Adding 2 files to histo. host and ptx to run visc generated host code with opencl driver generated ptx
Added a single kernel file for histogram opencl_nvidia kernels. Improved timing calculations for visc
Added single kernel file to opencl_nvidia version of histogram
visc version similar to nvidia version
Histogram improved
Merge branch 'master' of bitbucket.org:psrivas2/visc
Remove llvm intrinsic declarations
Fixed bug in histo. Was using get_group_id instead of visc intrinsic
Loading