- Dec 22, 2020
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Akash Kothari authored
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- Feb 04, 2020
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Akash Kothari authored
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- Jan 29, 2020
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Akash Kothari authored
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- Jan 27, 2020
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Yifan Zhao authored
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- Jan 24, 2020
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Adel Ejjeh authored
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Adel Ejjeh authored
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- Jan 23, 2020
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Yifan Zhao authored
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Yifan Zhao authored
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- Jan 22, 2020
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Adel Ejjeh authored
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Yifan Zhao authored
This reverts merge request !9
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Yifan Zhao authored
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- Jan 21, 2020
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Yifan Zhao authored
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- Jan 18, 2020
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Akash Kothari authored
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- Jan 17, 2020
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Yifan Zhao authored
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- Jan 16, 2020
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Yifan Zhao authored
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Yifan Zhao authored
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- Jan 14, 2020
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Akash Kothari authored
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Akash Kothari authored
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- Jan 08, 2020
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Akash Kothari authored
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- Jan 07, 2020
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Akash Kothari authored
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- Dec 27, 2019
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Hashim Sharif authored
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- Oct 24, 2018
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kotsifa2 authored
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- Sep 16, 2017
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kotsifa2 authored
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- Aug 19, 2017
- Aug 10, 2017
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kotsifa2 authored
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Prakalp Srivastava authored
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Prakalp Srivastava authored
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- Aug 09, 2017
- Aug 07, 2017
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kotsifa2 authored
(CPU/GPU/SPIR) based on policy. Support for scheduling per iteration included. Further testing required.
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- Jul 26, 2017
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Prakalp Srivastava authored
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- May 20, 2017
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kotsifa2 authored
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- Dec 01, 2016
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Prakalp Srivastava authored
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- May 01, 2016
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Prakalp Srivastava authored
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- Apr 23, 2016
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Prakalp Srivastava authored
Made visc-rt threadsafe by implementing locks across all ocl functions. Very crude. Fine grained locking possible if performance deteriotes
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- Mar 20, 2016
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Prakalp Srivastava authored
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- Mar 16, 2016
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Prakalp Srivastava authored
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- Mar 11, 2016
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Prakalp Srivastava authored
- IntrinsicsVISC.td, visc.h, GenVISC.cpp (2) Simplified GenVISC to easily add support for new intrinsics which have a 1 to 1 mapping instruction during code gen (3) Added runtime api call to set ocl shared memory argument
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- Mar 05, 2016
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Prakalp Srivastava authored
request_mem failure (2) modified visc_sh version of sgemm
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