Fixed citations and references

paper/DesignGoals.tex

@@ -3,7 +3,7 @@
 \label{section:goals}
 %------------------------------------------------------------------------------
 
-Previous work~\cite{PTX,VectorLLVA:VEE06} has shown that the approach of a 
+Previous work~\cite{PTX2.3Manual:URL,VectorLLVA:VEE06} has shown that the approach of a 
 virtual ISA can achieve both high performance and be commercially viable.
 In this work, we aim to design a virtual ISA for the wide range of parallel
 hardware configurations found in current and future mobile SoCs.
@@ -88,4 +88,4 @@ was one major change from Android's Dalvik virtual machine, which uses
 just-in-time (JIT) compilation every time an application is loaded, to the 
 ART system, which uses AOT compilation once at install time.
 
-\end{description}
\ No newline at end of file
+\end{description}

paper/VirtualISA.tex

@@ -58,7 +58,7 @@ static node can be replicated at runtime and the resulting dynamic
 nodes can be executed independently of each other, 
 subject only to the dependencies imposed by
 the dataflow edges.
-As described in Section~\ref{sec:impl:intrinsics}, nodes may be replicated
+As described in Section~\ref{sec:design:impl:intrinsics}, nodes may be replicated
 to form an n-dimensional grid; our current implementation allows up to 
 three dimensions.
 Similarly, a static dataflow edge between two static

paper/hetero.bib

@@ -224,6 +224,24 @@ ISSN={0162-8828},}
   year = {2010},
 }
 
+@misc{RenderScript,
+  author = {},
+  title = {{RenderScript}},
+  howpublished = {\url {http://developer.android.com/guide/topics/renderscript/compute.html}},
+}
+
+@misc{OpenACC,
+  author = {},
+  title = {{OpenACC-Standard}},
+  howpublished = {\url {http://www.openacc-standard.org/}},
+}
+
+@misc{HSAIL,
+  author = {},
+  title = {{HSAIL}},
+  howpublished = {\url {http://www.hsafoundation.com/standards/}},
+}
+
 @INPROCEEDINGS{GAUT,
 author={P. Coussy and G. Lhairech-Lebreton},
 booktitle={DATE},
@@ -1028,6 +1046,13 @@ ISSN={1063-6897},
   title = {{SPIR 1.0 Specification for OpenCL}},
 }
 
+ 
+@misc{CUDA,
+  howpublished = {http://docs.nvidia.com/cuda/},
+  author = {{nVidia}},
+  title = {{CUDA Toolkit Documentation v7.5}},
+}
+
 @article{Delite:SIGPLAN11,
  author = {Rompf, Tiark and Odersky, Martin},
  title = {Lightweight modular staging: a pragmatic approach to runtime code generation and compiled DSLs},
@@ -1292,3 +1317,88 @@ pilers;reduced instruction set computing;},
  keywords = {compiler framework for array-based language, gpu hybrid systems, matlab, python},
 } 
 
+@inproceedings{Halide,
+ author = {Ragan-Kelley, Jonathan and Barnes, Connelly and Adams, Andrew and Paris, Sylvain and Durand, Fr{\'e}do and Amarasinghe, Saman},
+ title = {Halide: A Language and Compiler for Optimizing Parallelism, Locality, and Recomputation in Image Processing Pipelines},
+ booktitle = {Proceedings of the 34th ACM SIGPLAN Conference on Programming Language Design and Implementation},
+ series = {PLDI '13},
+ year = {2013},
+ isbn = {978-1-4503-2014-6},
+ location = {Seattle, Washington, USA},
+ pages = {519--530},
+ numpages = {12},
+ url = {http://doi.acm.org/10.1145/2491956.2462176},
+ doi = {10.1145/2491956.2462176},
+ acmid = {2462176},
+ publisher = {ACM},
+ address = {New York, NY, USA},
+ keywords = {autotuning, compiler, domain specific language, gpu, image processing, locality, optimization, parallelism, redundant computation, vectorization},
+} 
+
+@inproceedings{PetaBricks,
+ author = {Ansel, Jason and Chan, Cy and Wong, Yee Lok and Olszewski, Marek and Zhao, Qin and Edelman, Alan and Amarasinghe, Saman},
+ title = {PetaBricks: A Language and Compiler for Algorithmic Choice},
+ booktitle = {Proceedings of the 30th ACM SIGPLAN Conference on Programming Language Design and Implementation},
+ series = {PLDI '09},
+ year = {2009},
+ isbn = {978-1-60558-392-1},
+ location = {Dublin, Ireland},
+ pages = {38--49},
+ numpages = {12},
+ url = {http://doi.acm.org/10.1145/1542476.1542481},
+ doi = {10.1145/1542476.1542481},
+ acmid = {1542481},
+ publisher = {ACM},
+ address = {New York, NY, USA},
+ keywords = {adaptive, algorithmic choice, autotuning, compiler, implicitly parallel, language},
+} 
+
+@inproceedings{ispc,
+  title={ispc: A SPMD compiler for high-performance CPU programming},
+  author={Pharr, Matt and Mark, William R},
+  booktitle={Innovative Parallel Computing (InPar), 2012},
+  pages={1--13},
+  year={2012},
+  organization={IEEE}
+}
+
+
+@article{Delite,
+ author = {Sujeeth, Arvind K. and Brown, Kevin J. and Lee, Hyoukjoong and Rompf, Tiark and Chafi, Hassan and Odersky, Martin and Olukotun, Kunle},
+ title = {Delite: A Compiler Architecture for Performance-Oriented Embedded Domain-Specific Languages},
+ journal = {ACM Trans. Embed. Comput. Syst.},
+ issue_date = {July 2014},
+ volume = {13},
+ number = {4s},
+ month = apr,
+ year = {2014},
+ issn = {1539-9087},
+ pages = {134:1--134:25},
+ articleno = {134},
+ numpages = {25},
+ url = {http://doi.acm.org/10.1145/2584665},
+ doi = {10.1145/2584665},
+ acmid = {2584665},
+ publisher = {ACM},
+ address = {New York, NY, USA},
+ keywords = {Domain-specific languages, code generation, language virtualization, multistage programming},
+} 
+
+@article{Parboil,
+  title={Parboil: A revised benchmark suite for scientific and commercial throughput computing},
+  author={Stratton, John A and Rodrigues, Christopher and Sung, I-Jui and Obeid, Nady and Chang, Li-Wen and Anssari, Nasser and Liu, Geng Daniel and Hwu, Wen-Mei W},
+  journal={Center for Reliable and High-Performance Computing},
+  year={2012}
+}
+
+
+@article{Opencl,
+  title={OpenCL: A parallel programming standard for heterogeneous computing systems},
+  author={Stone, John E and Gohara, David and Shi, Guochun},
+  journal={Computing in science and engineering},
+  volume={12},
+  number={1-3},
+  pages={66--73},
+  year={2010},
+  publisher={Institute of Electrical and Electronics Engineers, Inc., United States}
+}