Partially removing unused code

hpvm/lib/Transforms/DFG2LLVM_X86/DFG2LLVM_X86.cpp

@@ -99,7 +99,6 @@ private:
   //Functions
   std::vector<IntrinsicInst*>* getUseList(Value* LI);
   Value* addLoop(Instruction* I, Value* limit, const Twine& indexName = "");
-  void addDoWhileLoop(Instruction*, Instruction*, Value*);
   void addWhileLoop(Instruction*, Instruction*, Instruction*, Value*);
   Instruction *addWhileLoopCounter(BasicBlock *, BasicBlock *, BasicBlock *);
   Argument* getArgumentFromEnd(Function* F, unsigned offset);
@@ -362,34 +361,6 @@ Instruction* CGT_X86::addWhileLoopCounter(BasicBlock *Entry, BasicBlock *Cond,
   return CounterPhi;
 }
 
-/* Add Loop around the instruction I
- * Algorithm:
- * (1) Split the basic block of instruction I into three parts, where the
- * middleblock/body would contain instruction I.
- * (2) Add phi node before instruction I. Add incoming edge to phi node from
- * predecessor
- * (3) Add increment and compare instruction to index variable
- * (4) Replace terminator/branch instruction of body with conditional branch
- * which loops over bidy if true and goes to end if false
- * (5) Update phi node of body
- */
-void CGT_X86::addDoWhileLoop(Instruction* From, Instruction* To, Value* TerminationCond) {
-  BasicBlock* Entry = From->getParent();
-  BasicBlock* ForBody = Entry->splitBasicBlock(From, "for.body");
-
-  // To Instruction should also belong to the same basic block as the From basic
-  // block will have a terminator instruction
-  assert(To->getParent() == ForBody
-         && "To Instruction should also belong to the same basic block!");
-  BasicBlock* ForEnd = ForBody->splitBasicBlock(To, "for.end");
-
-  // Replace the terminator instruction of for.body with new conditional
-  // branch which loops over body if true and branches to for.end otherwise
-  BranchInst* BI = BranchInst::Create(ForEnd, ForBody, TerminationCond);
-  ReplaceInstWithInst(ForBody->getTerminator(), BI);
-
-}
-
 /* Add Loop around the instruction I
  * Algorithm:
  * (1) Split the basic block of instruction I into three parts, where the
@@ -1231,11 +1202,6 @@ Function* CGT_X86::createFunctionFilter(DFNode* C) {
                                            RI);
   }
 
-  // Add loop around the basic block, which exits the loop if isLastInput is false
-  //addDoWhileLoop(cast<Instruction>(Cond)->getNextNode(), RI, Cond);
-//  addWhileLoop(cast<Instruction>(isLastInputPop), cast<Instruction>(Cond)->getNextNode(),
-//                RI, Cond);
-
   // Add loop around the basic block, which exits the loop if isLastInput is false
   // Pointers to keep the created loop structure
   BasicBlock *EntryBB, *CondBB, *BodyBB;
@@ -1763,40 +1729,6 @@ void CGT_X86::codeGen(DFLeafNode* N) {
            << N->getFuncPointer()->getName() <<  "\n";
 
     switch (N->getTag()) {
-       case visc::CUDNN_TARGET: {
-          errs() << "CUDNN hint found. Store CUDNN function as CPU funtion.\n";
-         // Make sure there is a generated x86 function for cudnn
-         assert(N->getGenFuncForTarget(visc::CUDNN_TARGET) && "");
-         assert(N->hasX86GenFuncForTarget(visc::CUDNN_TARGET) && "");
-         // Store the CUDNN x86 function as the CPU generated function
-         Function *Ftmp = N->getGenFuncForTarget(N->getTag());
-         // after adding the required number of arguments
-         if (!N->getParent()->isChildGraphStreaming())
-           Ftmp = addIdxDimArgs(Ftmp);
-
-         N->removeGenFuncForTarget(visc::CUDNN_TARGET);
-         N->setTag(visc::None);
-         N->addGenFunc(Ftmp, visc::CPU_TARGET, true);
-         N->setTag(visc::CPU_TARGET);
-         break;
-         }
-       case visc::PROMISE_TARGET: {
-          errs() << "Promise hint found. Store PROMISE function as CPU funtion.\n";
-         // Make sure there is a generated x86 function for promise
-         assert(N->getGenFuncForTarget(visc::PROMISE_TARGET) && "");
-         assert(N->hasX86GenFuncForTarget(visc::PROMISE_TARGET) && "");
-         // Store the PROMISE x86 function as the CPU generated function
-         Function *Ftmp = N->getGenFuncForTarget(N->getTag());
-         // after adding the required number of arguments
-         if (!N->getParent()->isChildGraphStreaming())
-           Ftmp = addIdxDimArgs(Ftmp);
-
-         N->setTag(visc::None);
-         N->removeGenFuncForTarget(visc::PROMISE_TARGET);
-         N->addGenFunc(Ftmp, visc::CPU_TARGET, true);
-         N->setTag(visc::CPU_TARGET);
-         break;
-         }
        case visc::GPU_TARGET:
          // A leaf node should not have an x86 function for GPU
          // by design of DFG2LLVM_NVPTX backend