@@ -293,42 +293,4 @@ You can run tests by simply providing the appropriate target to ``make``: for ex
make -j<number of threads> check-hpvm-pass
runs ``check-hpvm-pass`` tests.
Benchmarks
----------
We also provide a number of general benchmarks, DNN benchmarks, and test cases, written in HPVM, living under ``$HPVM_BENCH_DIR=hpvm-release/hpvm/benchmarks``.
In order to be able to build the existing general benchmarks, a new ``Makefile.config`` must be created in ``$HPVM_BENCH_DIR/include`` based on the existing ``Makefile.config.example``. This configuration file must set up the following paths:
* ``LLVM_BUILD_DIR``: should point to your local ``build`` directory of HPVM.
* ``HPVM_BENCH_DIR``: should point to this benchmakrs directory.
* ``CUDA_PATH``: should point to your local CUDA installation, if available. Only required for GPU back end.
* ``OPENCL_PATH``: should point to a local OpenCL installation if not using the CUDA libraries. Required to point to Intel FPGA SDK for OpenCL libraries for FPGA back end.
When using the Makefile configuration file, it creates the following variables
that can be defined when running ``make`` to compile any of application:
* ``TARGET=<target>``: Must be used to specify what target device we are compiling to. It will set the ``DEVICE`` macro in the application kernel's ``__hpvm__hint()`` API call to mark the target device for each kernel. The variable accepts the following values
- ``TARGET=seq``: Sets compilation for CPU target. This is the default.
- ``TARGET=gpu``: Sets compilation for GPU target.
- ``TARGET=fpga``: Sets compilation for FPGA target.
* ``DEBUG=1``: When provided will enable a debug compilation so that the HPVM passes will output debug prints. If instead it is desired to enable debug prints for specific passes, ``--debug-only=<DEBUG_TYPE>`` can be added to the ``FPGA_OPTFLAGS`` (used in FPGA compilation), ``HPVM_OPTFLAGS`` (used in CPU/GPU compilation), ``HCC-OPTS`` (used for the HeteroC++ frontend), and ``OCLBE_FLAGS`` (used for the llvm-to-opencl back end tool) variables. For example, debug prints for the FPGA back end pass can be enabled using: ``FPGA_OPTFLATS += --debug-only=DFG2LLVM_FPGA``. Note that this will only enable *compilation* debug prints. HPVM does not currently support compiling programs in debug mode (i.e. with ``-g`` flag).
* Additionally, the FPGA target supports the following extra variables:
- ``EMULATION=1``: Can be used to enable compilation of the FPGA kernels in EMULATION mode. This also generates the necessary host code in the binary that would launch the Intel FPGA Emulator instead of the actual FPGA.
- ``BOARD=<board>``: Can be used to set the target FPGA borad. Defaults to ``a10gx``, i.e. Arria 10 GX Development Board.
- ``RTL=1``: Can be used to stop compilation after the RTL generation step where Intel AOC pre-synthesis reports get generated.
- ``PROFILE=1``: Enables FPGA compilation with profiling enabled (i.e. AOC sytnehsized the design with profile registers). Refer to `Intel FPGA SDK for OpenCL Programming Guide <https://www.intel.com/content/www/us/en/docs/programmable/683846/21-4/overview.html#ewa1411747396740>`_ for more information.
- ``FPGAOPTS=<opt_list>``: Enables the specified optimizations. For multiple optimization, seperate with a comma.
* ``LU``: Loop Unrolling. Additionally include ``UF=<unroll_factor>`` to set the unroll factor.
As an example, if we wish to compile an application for the FPGA target, in Emulation mode, with Loop Unrolling and Loop Fusion enabled, and with an unroll factor of 4, we can do that using:
