diff --git a/hpvm/lib/Transforms/DFG2LLVM_NVPTX/DFG2LLVM_NVPTX.cpp b/hpvm/lib/Transforms/DFG2LLVM_NVPTX/DFG2LLVM_NVPTX.cpp
index e3c21133b3987000311777ac7b9d50d8210c5e0f..84d17b26575d9ad7f15e2db268ffea39f67debb2 100644
--- a/hpvm/lib/Transforms/DFG2LLVM_NVPTX/DFG2LLVM_NVPTX.cpp
+++ b/hpvm/lib/Transforms/DFG2LLVM_NVPTX/DFG2LLVM_NVPTX.cpp
@@ -1063,7 +1063,6 @@ void CGT_NVPTX::codeGen(DFLeafNode* N) {
// If no allocation node was found, SharedMemArgs is empty
if (kernel->AllocationNode) {
-
ValueToValueMapTy VMap;
Function *F_alloc = CloneFunction(kernel->AllocationNode->getFuncPointer(), VMap);
//F_alloc->removeFromParent();
@@ -1376,8 +1375,6 @@ void CGT_NVPTX::codeGen(DFLeafNode* N) {
IItoRemove.push_back(II);
}
break;
- case Intrinsic::visc_atomic_cmpxchg:
- break;
case Intrinsic::visc_atomic_add:
case Intrinsic::visc_atomic_sub:
case Intrinsic::visc_atomic_xchg:
@@ -1386,8 +1383,6 @@ void CGT_NVPTX::codeGen(DFLeafNode* N) {
case Intrinsic::visc_atomic_and:
case Intrinsic::visc_atomic_or:
case Intrinsic::visc_atomic_xor:
- //case Intrinsic::visc_atomic_inc:
- //case Intrinsic::visc_atomic_dec:
{
DEBUG(errs() << *II << "\n");
// Only have support for i32 atomic intrinsics
@@ -2375,14 +2370,8 @@ static AtomicRMWInst::BinOp getAtomicOp(Intrinsic::ID ID) {
return AtomicRMWInst::Sub;
case Intrinsic::visc_atomic_min:
return AtomicRMWInst::Min;
- case Intrinsic::visc_atomic_umin:
- return AtomicRMWInst::UMin;
case Intrinsic::visc_atomic_max:
return AtomicRMWInst::Max;
- case Intrinsic::visc_atomic_umax:
- return AtomicRMWInst::UMax;
- //case Intrinsic::visc_atomic_inc: return AtomicRMWInst::Inc;
- //case Intrinsic::visc_atomic_dec: return AtomicRMWInst::Dec;
case Intrinsic::visc_atomic_xchg:
return AtomicRMWInst::Xchg;
case Intrinsic::visc_atomic_and:
@@ -2400,8 +2389,6 @@ static AtomicRMWInst::BinOp getAtomicOp(Intrinsic::ID ID) {
// Helper funtion, returns the OpenCL function name, corresponding to atomic op
static std::string getAtomicOpName(Intrinsic::ID ID) {
switch(ID) {
- case Intrinsic::visc_atomic_cmpxchg:
- return "atom_cmpxchg";
case Intrinsic::visc_atomic_add:
return "atom_add";
case Intrinsic::visc_atomic_sub:
@@ -2410,10 +2397,6 @@ static std::string getAtomicOpName(Intrinsic::ID ID) {
return "atom_min";
case Intrinsic::visc_atomic_max:
return "atom_max";
- case Intrinsic::visc_atomic_inc:
- return "atom_inc";
- case Intrinsic::visc_atomic_dec:
- return "atom_dec";
case Intrinsic::visc_atomic_xchg:
return "atom_xchg";
case Intrinsic::visc_atomic_and:
diff --git a/hpvm/lib/Transforms/GenVISC/GenVISC.cpp b/hpvm/lib/Transforms/GenVISC/GenVISC.cpp
index 9cce997f347db203644df60495a7abf9dc273562..d39003a294ec8ba44bdf943dbcf132555ec60d91 100644
--- a/hpvm/lib/Transforms/GenVISC/GenVISC.cpp
+++ b/hpvm/lib/Transforms/GenVISC/GenVISC.cpp
@@ -663,9 +663,6 @@ bool GenVISC::runOnModule(Module &M) {
if (isVISCCall_getNumNodeInstances_z(I)) {
ReplaceCallWithIntrinsic(I, Intrinsic::visc_getNumNodeInstances_z, &toBeErased);
}
- if (isVISCCall_atomic_cmpxchg(I)) {
- ReplaceCallWithIntrinsic(I, Intrinsic::visc_atomic_cmpxchg, &toBeErased);
- }
if (isVISCCall_atomic_add(I)) {
ReplaceCallWithIntrinsic(I, Intrinsic::visc_atomic_add, &toBeErased);
}
@@ -675,24 +672,12 @@ bool GenVISC::runOnModule(Module &M) {
if (isVISCCall_atomic_xchg(I)) {
ReplaceCallWithIntrinsic(I, Intrinsic::visc_atomic_xchg, &toBeErased);
}
- if (isVISCCall_atomic_inc(I)) {
- ReplaceCallWithIntrinsic(I, Intrinsic::visc_atomic_inc, &toBeErased);
- }
- if (isVISCCall_atomic_dec(I)) {
- ReplaceCallWithIntrinsic(I, Intrinsic::visc_atomic_dec, &toBeErased);
- }
if (isVISCCall_atomic_min(I)) {
ReplaceCallWithIntrinsic(I, Intrinsic::visc_atomic_min, &toBeErased);
}
- if (isVISCCall_atomic_umin(I)) {
- ReplaceCallWithIntrinsic(I, Intrinsic::visc_atomic_umin, &toBeErased);
- }
if (isVISCCall_atomic_max(I)) {
ReplaceCallWithIntrinsic(I, Intrinsic::visc_atomic_max, &toBeErased);
}
- if (isVISCCall_atomic_umax(I)) {
- ReplaceCallWithIntrinsic(I, Intrinsic::visc_atomic_umax, &toBeErased);
- }
if (isVISCCall_atomic_and(I)) {
ReplaceCallWithIntrinsic(I, Intrinsic::visc_atomic_and, &toBeErased);
}
@@ -702,15 +687,6 @@ bool GenVISC::runOnModule(Module &M) {
if (isVISCCall_atomic_xor(I)) {
ReplaceCallWithIntrinsic(I, Intrinsic::visc_atomic_xor, &toBeErased);
}
- if (isVISCCall_floor(I)) {
- ReplaceCallWithIntrinsic(I, Intrinsic::floor, &toBeErased);
- }
- if (isVISCCall_rsqrt(I)) {
- ReplaceCallWithIntrinsic(I, Intrinsic::nvvm_rsqrt_approx_f, &toBeErased);
- }
- if (isVISCCall_sqrt(I)) {
- ReplaceCallWithIntrinsic(I, Intrinsic::sqrt, &toBeErased);
- }
if (isVISCCall_sin(I)) {
ReplaceCallWithIntrinsic(I, Intrinsic::sin, &toBeErased);
}
diff --git a/hpvm/llvm_patches/include/IR/IntrinsicsVISC.td b/hpvm/llvm_patches/include/IR/IntrinsicsVISC.td
index ab22372d80ac6ae1de89c2da6c3402fd0787e181..d5330175d86c9576394c9363a4ba30fd651f19e8 100644
--- a/hpvm/llvm_patches/include/IR/IntrinsicsVISC.td
+++ b/hpvm/llvm_patches/include/IR/IntrinsicsVISC.td
@@ -170,10 +170,6 @@ let TargetPrefix = "visc" in {
/* ============ Atomic intrinsics ============= */
// Atomic arithmetic operations
-
- /* i32 llvm.visc.atomic.cmpxchg(i32*, i32)*/
- def int_visc_atomic_cmpxchg: Intrinsic<[llvm_i32_ty], [llvm_ptr_ty,
- llvm_i32_ty], []>;
/* i32 llvm.visc.atomic.add(i32*, i32)*/
def int_visc_atomic_add: Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty],
@@ -187,30 +183,14 @@ let TargetPrefix = "visc" in {
def int_visc_atomic_xchg: Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty],
[]>;
- /* i32 llvm.visc.atomic.inc(i32*, i32)*/
- def int_visc_atomic_inc: Intrinsic<[llvm_i32_ty], [llvm_ptr_ty],
- []>;
-
- /* i32 llvm.visc.atomic.dec(i32*, i32)*/
- def int_visc_atomic_dec: Intrinsic<[llvm_i32_ty], [llvm_ptr_ty],
- []>;
-
/* i32 llvm.visc.atomic.min(i32*, i32)*/
def int_visc_atomic_min: Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty],
[]>;
- /* i32 llvm.visc.atomic.umin(i32*, i32)*/
- def int_visc_atomic_umin: Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty],
- []>;
-
/* i32 llvm.visc.atomic.maxi32*, i32)*/
def int_visc_atomic_max: Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty],
[]>;
- /* i32 llvm.visc.atomic.umaxi32*, i32)*/
- def int_visc_atomic_umax: Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty],
- []>;
-
// Atomic bitwise operations
/* i32 llvm.visc.atomic.and(i32*, i32)*/
@@ -224,105 +204,5 @@ let TargetPrefix = "visc" in {
/* i32 llvm.visc.atomic.xor(i32*, i32)*/
def int_visc_atomic_xor: Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty],
[]>;
- /***************************************************************************/
- /* ApproxHPVM intrinsics */
- /***************************************************************************/
-
- /* Tensor add intrinsic
- * i8* llvm.visc.tensor.add(i8*, i8*);
- */
- def int_visc_tensor_add : Intrinsic<[llvm_ptr_ty], [llvm_ptr_ty,
- llvm_ptr_ty], []>;
-
- /* Tensor mul intrinsic
- * i8* llvm.visc.tensor.mul(i8*, i8*);
- */
- def int_visc_tensor_mul : Intrinsic<[llvm_ptr_ty], [llvm_ptr_ty,
- llvm_ptr_ty], []>;
-
- /* Tensor relu intrinsic
- * i8* llvm.visc.tensor.relu(i8*);
- */
- def int_visc_tensor_relu : Intrinsic<[llvm_ptr_ty], [llvm_ptr_ty], []>;
-
- /* Tensor clipped relu intrinsic
- * i8* llvm.visc.tensor.clipped.relu(i8*);
- */
- def int_visc_tensor_clipped_relu : Intrinsic<[llvm_ptr_ty], [llvm_ptr_ty], []>;
-
- /* Tensor tanh intrinsic
- * i8* llvm.visc.tensor.tanh(i8*);
- */
- def int_visc_tensor_tanh : Intrinsic<[llvm_ptr_ty], [llvm_ptr_ty], []>;
-
- /* Tensor sigmoid intrinsic
- * i8* llvm.visc.tensor.sigmoid(i8*);
- */
- def int_visc_tensor_sigmoid : Intrinsic<[llvm_ptr_ty], [llvm_ptr_ty], []>;
-
- /* Tensor softmax intrinsic
- * i8* llvm.visc.tensor.softmax(i8*);
- */
- def int_visc_tensor_softmax : Intrinsic<[llvm_ptr_ty], [llvm_ptr_ty], []>;
-
- /* Tensor convolution intrinsic
- * i8* llvm.visc.tensor.convolution(i8*, i8*, i32, i32, i32, i32);
- */
- def int_visc_tensor_convolution : Intrinsic<[llvm_ptr_ty], [llvm_ptr_ty,
- llvm_ptr_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty], []>;
-
- /* Tensor group convolution intrinsic
- * i8* llvm.visc.tensor.group.convolution(i8*, i8*, i32, i32, i32, i32, i32, i32);
- */
- def int_visc_tensor_group_convolution : Intrinsic<[llvm_ptr_ty], [llvm_ptr_ty,
- llvm_ptr_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty], []>;
-
- /* Tensor BatchNorm intrinsic
- * i8* llvm.visc.tensor.batchnorm(i8*, i8*, i8*, i8*, i8*, double);
- */
- def int_visc_tensor_batchnorm : Intrinsic<[llvm_ptr_ty], [llvm_ptr_ty,
- llvm_ptr_ty,
- llvm_ptr_ty,
- llvm_ptr_ty,
- llvm_ptr_ty,
- llvm_double_ty], []>;
-
-
- /* Tensor pool intrinsics: max, min, average
- * i8* llvm.visc.tensor.pool.max(i8*, i32, i32, i32, i32, i32, i32);
- * i8* llvm.visc.tensor.pool.min(i8*, i32, i32, i32, i32, i32, i32);
- * i8* llvm.visc.tensor.pool.average(i8*, i32, i32, i32, i32, i32, i32);
- */
- def int_visc_tensor_pool_max : Intrinsic<[llvm_ptr_ty], [llvm_ptr_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty], []>;
- def int_visc_tensor_pool_min : Intrinsic<[llvm_ptr_ty], [llvm_ptr_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty], []>;
- def int_visc_tensor_pool_mean : Intrinsic<[llvm_ptr_ty], [llvm_ptr_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty,
- llvm_i32_ty], []>;
}