From 6da8dc06911f193257fbfa3889e79214bf2037e9 Mon Sep 17 00:00:00 2001
From: Akash Kothari <akashk4@tyler.cs.illinois.edu>
Date: Mon, 20 Jan 2020 09:26:27 -0600
Subject: [PATCH] Removing support for unused targets
---
hpvm/include/SupportVISC/DFGraph.h | 84 ++--------
hpvm/include/SupportVISC/VISCUtils.h | 154 +-----------------
.../Transforms/DFG2LLVM_X86/DFG2LLVM_X86.cpp | 75 +++------
3 files changed, 33 insertions(+), 280 deletions(-)
diff --git a/hpvm/include/SupportVISC/DFGraph.h b/hpvm/include/SupportVISC/DFGraph.h
index de0f5f9945..ccc78a3357 100644
--- a/hpvm/include/SupportVISC/DFGraph.h
+++ b/hpvm/include/SupportVISC/DFGraph.h
@@ -403,25 +403,16 @@ public:
void setHasX86FuncForTarget(visc::Target T, bool isX86Func) {
switch (T) {
+ case visc::None:
+ return; // Do nothing.
case visc::CPU_TARGET:
GenFuncInfo.cpu_hasX86Func = isX86Func;
break;
case visc::GPU_TARGET:
GenFuncInfo.gpu_hasX86Func = isX86Func;
break;
- case visc::SPIR_TARGET:
- GenFuncInfo.spir_hasX86Func = isX86Func;
- break;
- case visc::CUDNN_TARGET:
- GenFuncInfo.cudnn_hasX86Func = isX86Func;
- break;
- case visc::PROMISE_TARGET:
- GenFuncInfo.promise_hasX86Func = isX86Func;
- break;
case visc::CPU_OR_GPU_TARGET:
- case visc::CPU_OR_SPIR_TARGET:
- assert(false && "Single target expected (CPU/GPU/SPIR)\n");
- break;
+ break;
default:
assert(false && "Unknown target\n");
break;
@@ -431,25 +422,18 @@ public:
bool hasX86GenFuncForTarget(visc::Target T) const {
switch (T) {
+ case visc::None:
+ return false;
case visc::CPU_TARGET:
return GenFuncInfo.cpu_hasX86Func;
case visc::GPU_TARGET:
return GenFuncInfo.gpu_hasX86Func;
- case visc::SPIR_TARGET:
- return GenFuncInfo.spir_hasX86Func;
- case visc::CUDNN_TARGET:
- return GenFuncInfo.cudnn_hasX86Func;
- case visc::PROMISE_TARGET:
- return GenFuncInfo.promise_hasX86Func;
case visc::CPU_OR_GPU_TARGET:
- case visc::CPU_OR_SPIR_TARGET:
assert(false && "Single target expected (CPU/GPU/SPIR/CUDNN/PROMISE)\n");
- return false;
default:
assert(false && "Unknown target\n");
- return false;
}
-
+ return false;
}
void addGenFunc(Function* F, visc::Target T, bool isX86Func) {
@@ -471,39 +455,12 @@ public:
GenFuncs.GPUGenFunc = F;
GenFuncInfo.gpu_hasX86Func = isX86Func;
break;
- case visc::SPIR_TARGET:
- if (GenFuncs.SPIRGenFunc != NULL) {
- errs() << "Warning: Second generated SPIR function for node "
- << FuncPointer->getName() << "\n";
- }
- GenFuncs.SPIRGenFunc = F;
- GenFuncInfo.spir_hasX86Func = isX86Func;
- break;
- case visc::CUDNN_TARGET:
- if (GenFuncs.CUDNNGenFunc != NULL) {
- errs() << "Warning: Second generated CUDNN function for node "
- << FuncPointer->getName() << "\n";
- }
- GenFuncs.CUDNNGenFunc = F;
- GenFuncInfo.cudnn_hasX86Func = isX86Func;
- break;
- case visc::PROMISE_TARGET:
- if (GenFuncs.PROMISEGenFunc != NULL) {
- errs() << "Warning: Second generated PROMISE function for node "
- << FuncPointer->getName() << "\n";
- }
- GenFuncs.PROMISEGenFunc = F;
- GenFuncInfo.promise_hasX86Func = isX86Func;
- break;
case visc::CPU_OR_GPU_TARGET:
- case visc::CPU_OR_SPIR_TARGET:
assert(false &&
"A node function should be set with a tag specifying its \
type, not the node hint itself\n");
- break;
default:
assert(false && "Unknown target for generated function\n");
- break;
}
Tag = viscUtils::getUpdatedTag(Tag,T);
@@ -511,30 +468,26 @@ public:
Function* getGenFuncForTarget(visc::Target T) const {
switch (T) {
+ case visc::None:
+ return NULL;
case visc::CPU_TARGET:
return GenFuncs.CPUGenFunc;
case visc::GPU_TARGET:
return GenFuncs.GPUGenFunc;
- case visc::SPIR_TARGET:
- return GenFuncs.SPIRGenFunc;
- case visc::CUDNN_TARGET:
- return GenFuncs.CUDNNGenFunc;
- case visc::PROMISE_TARGET:
- return GenFuncs.PROMISEGenFunc;
case visc::CPU_OR_GPU_TARGET:
- case visc::CPU_OR_SPIR_TARGET:
assert(false &&
"Requesting genarated node function with dual tag instead of \
CPU/GPU/SPIR/CUDNN/PROMISE\n");
- return NULL;
default:
assert(false && "Unknown target for generated function\n");
- return NULL;
}
+ return NULL;
}
void removeGenFuncForTarget(visc::Target T) {
switch (T) {
+ case visc::None:
+ return;
case visc::CPU_TARGET:
GenFuncs.CPUGenFunc = NULL;
GenFuncInfo.cpu_hasX86Func = false;
@@ -543,27 +496,12 @@ public:
GenFuncs.GPUGenFunc = NULL;
GenFuncInfo.gpu_hasX86Func = false;
break;
- case visc::SPIR_TARGET:
- GenFuncs.SPIRGenFunc = NULL;
- GenFuncInfo.spir_hasX86Func = false;
- break;
- case visc::CUDNN_TARGET:
- GenFuncs.CUDNNGenFunc = NULL;
- GenFuncInfo.cudnn_hasX86Func = false;
- break;
- case visc::PROMISE_TARGET:
- GenFuncs.PROMISEGenFunc = NULL;
- GenFuncInfo.promise_hasX86Func = false;
- break;
case visc::CPU_OR_GPU_TARGET:
- case visc::CPU_OR_SPIR_TARGET:
assert(false &&
"Removing genarated node function with dual tag instead of \
CPU/GPU/SPIR/CUDNN/PROMISE\n");
- break;
default:
assert(false && "Unknown target for generated function\n");
- break;
}
return;
}
diff --git a/hpvm/include/SupportVISC/VISCUtils.h b/hpvm/include/SupportVISC/VISCUtils.h
index cfd9346792..76c80ed94d 100644
--- a/hpvm/include/SupportVISC/VISCUtils.h
+++ b/hpvm/include/SupportVISC/VISCUtils.h
@@ -120,12 +120,8 @@ void fixHintMetadata(Module &M, Function* F, Function* G) {
};
FixHint("visc_hint_gpu");
- FixHint("visc_hint_spir");
- FixHint("visc_hint_cudnn");
- FixHint("visc_hint_promise");
FixHint("visc_hint_cpu");
FixHint("visc_hint_cpu_gpu");
- FixHint("visc_hint_cpu_spir");
}
// Assuming that the changed function is a node function, it is only used as a
@@ -294,72 +290,6 @@ Function* cloneFunction(Function* F, FunctionType* newFT,
return newF;
}
-// Create new function F' as a copy of old function F with a new signature.
-// The following two most used cases are handled by this function.
-// 1. When some extra arguments need to be added to this function
-// - Here we can map the old function arguments to
-// new ones
-// 2. When each pointer argument needs an additional size argument
-// - Here, in the absence of VMap, we map the arguments in order, skipping
-// over extra pointer arguments.
-// The function returns the list of return instructions to the caller to fix in
-// case the return type is also changed.
-//Function* cloneFunction(Function* F, FunctionType* newFT, bool
-// isAddingPtrSizeArg, SmallVectorImpl<ReturnInst*>* Returns = NULL) {
-//
-// DEBUG(errs() << "Cloning Function: " << F->getName() << "\n");
-// DEBUG(errs() << "Old Function Type: " << *F->getFunctionType() << "\n");
-// DEBUG(errs() << "New Function Type: " << *newFT << "\n");
-//
-// assert(F->getFunctionType()->getNumParams() <= newFT->getNumParams()
-// && "This function assumes that the new function has more arguments than the old function!");
-//
-// // Create Function of specified type
-// Function* newF = Function::Create(newFT, F->getLinkage(), F->getName()+"_cloned", F->getParent());
-// DEBUG(errs() << "Old Function name: " << F->getName() << "\n");
-// DEBUG(errs() << "New Function name: " << newF->getName() << "\n");
-// ValueToValueMapTy VMap;
-// DEBUG(errs() << "No value map provided. Creating default value map\n");
-// if(isAddingPtrSizeArg) {
-// DEBUG(errs() << "Case 1: Pointer arg followed by a i64 size argument in new function\n");
-// Function::arg_iterator new_ai = newF->arg_begin();
-// for(Function::arg_iterator ai = F->arg_begin(), ae = F->arg_end();
-// ai != ae; ++ai) {
-// DEBUG(errs() << ai->getArgNo() << ". " << *ai << " : " << *new_ai << "\n");
-// assert(ai->getType() == new_ai->getType() && "Arguments type do not match!");
-// VMap[&*ai] = &*new_ai;
-// new_ai->takeName(&*ai);
-// if(ai->getType()->isPointerTy()) {
-// std::string oldName = new_ai->getName();
-// // If the current argument is pointer type, the next argument in new
-// // function would be an i64 type containing the data size of this
-// // argument. Hence, skip the next arguement in new function.
-// ++new_ai;
-// new_ai->setName("bytes_"+oldName);
-// }
-// ++new_ai;
-// }
-// }
-// else {
-// DEBUG(errs() << "Case 2: Extra arguments are added at the end of old function\n");
-// Function::arg_iterator new_ai = newF->arg_begin();
-// for(Function::arg_iterator ai = F->arg_begin(), ae = F->arg_end();
-// ai != ae; ++ai, ++new_ai) {
-// DEBUG(errs() << ai->getArgNo() << ". " << *ai << " : " << *new_ai << "\n");
-// assert(ai->getType() == new_ai->getType() && "Arguments type do not match!");
-// VMap[&*ai] = &*new_ai;
-// new_ai->takeName(&*ai);
-// }
-// }
-//
-// // Clone function
-// if (Returns == NULL)
-// Returns = new SmallVector<ReturnInst*, 8>();
-// CloneFunctionInto(newF, F, VMap, false, *Returns);
-//
-// return newF;
-//}
-
// Overloaded version of cloneFunction
Function *cloneFunction(Function *F, Function *newF,
bool isAddingPtrSizeArg,
@@ -435,30 +365,12 @@ bool tagIncludesTarget(visc::Target Tag, visc::Target T) {
if (T == visc::GPU_TARGET)
return true;
return false;
- case visc::SPIR_TARGET:
- if (T == visc::SPIR_TARGET)
- return true;
- return false;
- case visc::CUDNN_TARGET:
- if (T == visc::CUDNN_TARGET)
- return true;
- return false;
- case visc::PROMISE_TARGET:
- if (T == visc::PROMISE_TARGET)
- return true;
- return false;
case visc::CPU_OR_GPU_TARGET:
if ((T == visc::CPU_TARGET) ||
(T == visc::GPU_TARGET) ||
(T == visc::CPU_OR_GPU_TARGET))
return true;
return false;
- case visc::CPU_OR_SPIR_TARGET:
- if ((T == visc::CPU_TARGET) ||
- (T == visc::SPIR_TARGET) ||
- (T == visc::CPU_OR_SPIR_TARGET))
- return true;
- return false;
default:
assert(false && "Unknown Target\n");
}
@@ -466,62 +378,32 @@ bool tagIncludesTarget(visc::Target Tag, visc::Target T) {
bool isSingleTargetTag(visc::Target T) {
return ((T == visc::CPU_TARGET) ||
- (T == visc::GPU_TARGET) ||
- (T == visc::SPIR_TARGET) ||
- (T == visc::CUDNN_TARGET) ||
- (T == visc::PROMISE_TARGET));
+ (T == visc::GPU_TARGET));
}
// Add the specified target to the given tag
visc::Target getUpdatedTag(visc::Target Tag, visc::Target T) {
assert(((T == visc::CPU_TARGET) ||
- (T == visc::GPU_TARGET) ||
- (T == visc::SPIR_TARGET) ||
- (T == visc::CUDNN_TARGET) ||
- (T == visc::PROMISE_TARGET)) &&
+ (T == visc::GPU_TARGET)) &&
"The target is only allowed to be a single target: CPU, GPU, SPIR, CUDNN, PROMISE\n");
switch (Tag) {
case visc::None:
return T;
case visc::CPU_TARGET:
- assert((T != visc::CUDNN_TARGET) && (T != visc::PROMISE_TARGET) &&
- "Unsupported target combination\n");
if (T == visc::CPU_TARGET)
return visc::CPU_TARGET;
if (T == visc::GPU_TARGET)
return visc::CPU_OR_GPU_TARGET;
- if (T == visc::SPIR_TARGET)
- return visc::CPU_OR_SPIR_TARGET;
return T;
case visc::GPU_TARGET:
- assert((T != visc::SPIR_TARGET) && "Unsupported target combination\n");
- assert((T != visc::CUDNN_TARGET) && (T != visc::PROMISE_TARGET) &&
- "Unsupported target combination\n");
if (T == visc::CPU_TARGET)
return visc::CPU_OR_GPU_TARGET;
if (T == visc::GPU_TARGET)
return visc::GPU_TARGET;
return T;
- case visc::SPIR_TARGET:
- assert((T != visc::GPU_TARGET) && "Unsupported target combination\n");
- assert((T != visc::CUDNN_TARGET) && (T != visc::PROMISE_TARGET) &&
- "Unsupported target combination\n");
- if (T == visc::CPU_TARGET)
- return visc::CPU_OR_SPIR_TARGET;
- if (T == visc::SPIR_TARGET)
- return visc::SPIR_TARGET;
- return T;
case visc::CPU_OR_GPU_TARGET:
- assert((T != visc::CUDNN_TARGET) && (T != visc::PROMISE_TARGET) &&
- "Unsupported target combination\n");
- assert((T != visc::SPIR_TARGET) && "Unsupported target combination\n");
return visc::CPU_OR_GPU_TARGET;
- case visc::CPU_OR_SPIR_TARGET:
- assert((T != visc::CUDNN_TARGET) && (T != visc::PROMISE_TARGET) &&
- "Unsupported target combination\n");
- assert((T != visc::GPU_TARGET) && "Unsupported target combination\n");
- return visc::CPU_OR_SPIR_TARGET;
default:
assert(false && "Unknown Target\n");
}
@@ -541,18 +423,6 @@ void addHint(Function* F, visc::Target T) {
DEBUG(errs() << "GPU Target\n");
HintNode = M->getOrInsertNamedMetadata("visc_hint_gpu");
break;
- case visc::SPIR_TARGET:
- DEBUG(errs() << "SPIR Target\n");
- HintNode = M->getOrInsertNamedMetadata("visc_hint_spir");
- break;
- case visc::CUDNN_TARGET:
- DEBUG(errs() << "CUDNN Target\n");
- HintNode = M->getOrInsertNamedMetadata("visc_hint_cudnn");
- break;
- case visc::PROMISE_TARGET:
- DEBUG(errs() << "PROMISE Target\n");
- HintNode = M->getOrInsertNamedMetadata("visc_hint_promise");
- break;
case visc::CPU_TARGET:
DEBUG(errs() << "CPU Target\n");
HintNode = M->getOrInsertNamedMetadata("visc_hint_cpu");
@@ -561,10 +431,6 @@ void addHint(Function* F, visc::Target T) {
DEBUG(errs() << "CPU or GPU Target\n");
HintNode = M->getOrInsertNamedMetadata("visc_hint_cpu_gpu");
break;
- case visc::CPU_OR_SPIR_TARGET:
- DEBUG(errs() << "CPU or SPIR Target\n");
- HintNode = M->getOrInsertNamedMetadata("visc_hint_cpu_spir");
- break;
default:
llvm_unreachable("Unsupported Target Hint!");
break;
@@ -587,21 +453,9 @@ void removeHint(Function* F, visc::Target T) {
case visc::GPU_TARGET:
HintNode = M->getOrInsertNamedMetadata("visc_hint_gpu");
break;
- case visc::SPIR_TARGET:
- HintNode = M->getOrInsertNamedMetadata("visc_hint_spir");
- break;
- case visc::CUDNN_TARGET:
- HintNode = M->getOrInsertNamedMetadata("visc_hint_cudnn");
- break;
- case visc::PROMISE_TARGET:
- HintNode = M->getOrInsertNamedMetadata("visc_hint_promise");
- break;
case visc::CPU_OR_GPU_TARGET:
HintNode = M->getOrInsertNamedMetadata("visc_hint_cpu_gpu");
break;
- case visc::CPU_OR_SPIR_TARGET:
- HintNode = M->getOrInsertNamedMetadata("visc_hint_cpu_spir");
- break;
case visc::CPU_TARGET:
HintNode = M->getOrInsertNamedMetadata("visc_hint_cpu");
break;
@@ -648,11 +502,7 @@ visc::Target getPreferredTarget(Function* F) {
if(FoundPrefTarget("visc_hint_cpu")) return visc::CPU_TARGET;
if(FoundPrefTarget("visc_hint_gpu")) return visc::GPU_TARGET;
- if(FoundPrefTarget("visc_hint_spir")) return visc::SPIR_TARGET;
- if(FoundPrefTarget("visc_hint_cudnn")) return visc::CUDNN_TARGET;
- if(FoundPrefTarget("visc_hint_promise")) return visc::PROMISE_TARGET;
if(FoundPrefTarget("visc_hint_cpu_gpu")) return visc::CPU_OR_GPU_TARGET;
- if(FoundPrefTarget("visc_hint_cpu_spir")) return visc::CPU_OR_SPIR_TARGET;
return visc::None;
}
diff --git a/hpvm/lib/Transforms/DFG2LLVM_X86/DFG2LLVM_X86.cpp b/hpvm/lib/Transforms/DFG2LLVM_X86/DFG2LLVM_X86.cpp
index 06e4e79183..ca5495f06d 100644
--- a/hpvm/lib/Transforms/DFG2LLVM_X86/DFG2LLVM_X86.cpp
+++ b/hpvm/lib/Transforms/DFG2LLVM_X86/DFG2LLVM_X86.cpp
@@ -1466,11 +1466,9 @@ void CGT_X86::codeGen(DFInternalNode* N) {
// For now, use node function name and change it later
Function *CF = N->getGenFuncForTarget(visc::CPU_TARGET);
Function *GF = N->getGenFuncForTarget(visc::GPU_TARGET);
- Function *SF = N->getGenFuncForTarget(visc::SPIR_TARGET);
bool CFx86 = N->hasX86GenFuncForTarget(visc::CPU_TARGET);
bool GFx86 = N->hasX86GenFuncForTarget(visc::GPU_TARGET);
- bool SFx86 = N->hasX86GenFuncForTarget(visc::SPIR_TARGET);
errs() << "Node: " << N->getFuncPointer()->getName()
<< " with tag " << N->getTag() << "\n";
@@ -1478,8 +1476,6 @@ void CGT_X86::codeGen(DFInternalNode* N) {
errs() << "hasx86GenFuncForCPU : " << CFx86 << "\n";
errs() << "GPU Fun: " << (GF ? GF->getName() : "null" ) << "\n";
errs() << "hasx86GenFuncForGPU : " << GFx86 << "\n";
- errs() << "SPIR Fun: " << (SF ? SF->getName() : "null" ) << "\n";
- errs() << "hasx86GenFuncForSPIR : " << SFx86 << "\n";
if (N->getTag() == visc::None) {
@@ -1503,24 +1499,12 @@ void CGT_X86::codeGen(DFInternalNode* N) {
assert(N->hasX86GenFuncForTarget(visc::CPU_TARGET) && "");
assert(!(N->getGenFuncForTarget(visc::GPU_TARGET)) && "");
assert(!(N->hasX86GenFuncForTarget(visc::GPU_TARGET)) && "");
- assert(!(N->getGenFuncForTarget(visc::SPIR_TARGET)) && "");
- assert(!(N->hasX86GenFuncForTarget(visc::SPIR_TARGET)) && "");
break;
case visc::GPU_TARGET:
assert(!(N->getGenFuncForTarget(visc::CPU_TARGET)) && "");
assert(!(N->hasX86GenFuncForTarget(visc::CPU_TARGET)) && "");
assert(N->getGenFuncForTarget(visc::GPU_TARGET) && "");
assert(N->hasX86GenFuncForTarget(visc::GPU_TARGET) && "");
- assert(!(N->getGenFuncForTarget(visc::SPIR_TARGET)) && "");
- assert(!(N->hasX86GenFuncForTarget(visc::SPIR_TARGET)) && "");
- break;
- case visc::SPIR_TARGET:
- assert(!(N->getGenFuncForTarget(visc::CPU_TARGET)) && "");
- assert(!(N->hasX86GenFuncForTarget(visc::CPU_TARGET)) && "");
- assert(!(N->getGenFuncForTarget(visc::GPU_TARGET)) && "");
- assert(!(N->hasX86GenFuncForTarget(visc::GPU_TARGET)) && "");
- assert(N->getGenFuncForTarget(visc::SPIR_TARGET) && "");
- assert(N->hasX86GenFuncForTarget(visc::SPIR_TARGET) && "");
break;
default:
assert(false && "Unreachable: we checked that tag was single target!\n");
@@ -1536,9 +1520,6 @@ void CGT_X86::codeGen(DFInternalNode* N) {
case visc::GPU_TARGET:
NodeGenFunc = N->getGenFuncForTarget(visc::GPU_TARGET);
break;
- case visc::SPIR_TARGET:
- NodeGenFunc = N->getGenFuncForTarget(visc::SPIR_TARGET);
- break;
default:
break;
}
@@ -1558,7 +1539,6 @@ void CGT_X86::codeGen(DFInternalNode* N) {
Function *Ftmp = N->getGenFuncForTarget(N->getTag());
N->removeGenFuncForTarget(visc::GPU_TARGET);
- N->removeGenFuncForTarget(visc::SPIR_TARGET);
N->setTag(visc::None);
N->addGenFunc(Ftmp, visc::CPU_TARGET, true);
N->setTag(visc::CPU_TARGET);
@@ -1566,11 +1546,9 @@ void CGT_X86::codeGen(DFInternalNode* N) {
// Sanity checks - to be removed TODO
CF = N->getGenFuncForTarget(visc::CPU_TARGET);
GF = N->getGenFuncForTarget(visc::GPU_TARGET);
- SF = N->getGenFuncForTarget(visc::SPIR_TARGET);
CFx86 = N->hasX86GenFuncForTarget(visc::CPU_TARGET);
GFx86 = N->hasX86GenFuncForTarget(visc::GPU_TARGET);
- SFx86 = N->hasX86GenFuncForTarget(visc::SPIR_TARGET);
errs() << "After editing\n";
errs() << "Node: " << N->getFuncPointer()->getName()
@@ -1579,8 +1557,6 @@ void CGT_X86::codeGen(DFInternalNode* N) {
errs() << "hasx86GenFuncForCPU : " << CFx86 << "\n";
errs() << "GPU Fun: " << (GF ? GF->getName() : "null" ) << "\n";
errs() << "hasx86GenFuncForGPU : " << GFx86 << "\n";
- errs() << "SPIR Fun: " << (SF ? SF->getName() : "null" ) << "\n";
- errs() << "hasx86GenFuncForSPIR : " << SFx86 << "\n";
// assert(false && "got to the point where we have to select\n");
} else {
@@ -1591,26 +1567,21 @@ void CGT_X86::codeGen(DFInternalNode* N) {
Function *CF = N->getGenFuncForTarget(visc::CPU_TARGET);
Function *GF = N->getGenFuncForTarget(visc::GPU_TARGET);
- Function *SF = N->getGenFuncForTarget(visc::SPIR_TARGET);
bool CFx86 = N->hasX86GenFuncForTarget(visc::CPU_TARGET);
bool GFx86 = N->hasX86GenFuncForTarget(visc::GPU_TARGET);
- bool SFx86 = N->hasX86GenFuncForTarget(visc::SPIR_TARGET);
// These assertions express what we can support with the current runtime.
// Code generation works the same way even for other target combinations.
// For now, we want either CPU and GPU, or CPU and SPIR
- assert((CF && (GF && !SF || !GF && SF)) && "Invalid target selection\n");
- assert((CFx86 && (GFx86 && !SFx86 || !GFx86 && SFx86)) &&
+ assert((CF && (GF || !GF)) && "Invalid target selection\n");
+ assert((CFx86 && (GFx86 || !GFx86)) &&
"Generated functions without appropriate x86 wrapper\n");
FunctionType *FT = CF->getFunctionType();
if (GF)
assert(FT == GF->getFunctionType() &&
"Type mismatch between generated functions for GPU and CPU targets.\n");
- if (SF)
- assert(FT == SF->getFunctionType() &&
- "Type mismatch between generated functions for SPIR and CPU targets.\n");
// Code generation of wrapper function
Function *F_wrapper;
@@ -1700,28 +1671,28 @@ void CGT_X86::codeGen(DFInternalNode* N) {
// Switch basic block pointers
BBcurrent = BBfalse;
- if (SF) {
+ // if (SF) {
// We have a GPU version. Generate policy check and call
- CmpConst =
- ConstantInt::get(Type::getInt32Ty(M.getContext()), 2, true);
- CmpI = CmpInst::Create(Instruction::ICmp, CmpInst::ICMP_EQ,
- RTFInst, CmpConst, "", BBcurrent);
- BBtrue = BasicBlock::Create(M.getContext(), "version_spir", F_wrapper);
- BBfalse = BasicBlock::Create(M.getContext(), "not_spir", F_wrapper);
- BrI = BranchInst::Create(BBtrue, BBfalse, CmpI, BBcurrent);
+ // CmpConst =
+ // ConstantInt::get(Type::getInt32Ty(M.getContext()), 2, true);
+ //CmpI = CmpInst::Create(Instruction::ICmp, CmpInst::ICMP_EQ,
+ // RTFInst, CmpConst, "", BBcurrent);
+ //BBtrue = BasicBlock::Create(M.getContext(), "version_spir", F_wrapper);
+ // BBfalse = BasicBlock::Create(M.getContext(), "not_spir", F_wrapper);
+ // BrI = BranchInst::Create(BBtrue, BBfalse, CmpI, BBcurrent);
- GenFuncCI = CallInst::Create(SF, GenFuncCallArgs, "", BBtrue);
- RI = ReturnInst::Create(M.getContext(), GenFuncCI, BBtrue);
+ // GenFuncCI = CallInst::Create(SF, GenFuncCallArgs, "", BBtrue);
+ // RI = ReturnInst::Create(M.getContext(), GenFuncCI, BBtrue);
- if (DeviceAbstraction) {
+ // if (DeviceAbstraction) {
// Prepare arguments and function for call to wait for device runtime call
- std::vector<Value *> Args; // TODO: add the device type as argument?
- FunctionCallee RTF =
- M.getOrInsertFunction("llvm_visc_deviceAbstraction_waitOnDeviceStatus",
- runtimeModule->getFunction("llvm_visc_deviceAbstraction_waitOnDeviceStatus")->getFunctionType());
- CallInst *RTFInst = CallInst::Create(RTF, Args, "", GenFuncCI);
- }
- }
+ // std::vector<Value *> Args; // TODO: add the device type as argument?
+ // FunctionCallee RTF =
+ // M.getOrInsertFunction("llvm_visc_deviceAbstraction_waitOnDeviceStatus",
+ // runtimeModule->getFunction("llvm_visc_deviceAbstraction_waitOnDeviceStatus")->getFunctionType());
+ // CallInst *RTFInst = CallInst::Create(RTF, Args, "", GenFuncCI);
+ // }
+ // }
RI = ReturnInst::Create(M.getContext(),
UndefValue::get(FT->getReturnType()), BBfalse);
@@ -1730,7 +1701,6 @@ void CGT_X86::codeGen(DFInternalNode* N) {
// Remove all other versions and update the tag
N->addGenFunc(F_wrapper, visc::CPU_TARGET, true);
N->removeGenFuncForTarget(visc::GPU_TARGET);
- N->removeGenFuncForTarget(visc::SPIR_TARGET);
N->setTag(visc::CPU_TARGET);
// assert(false && "got to the point where we have to combine\n");
@@ -1774,11 +1744,6 @@ void CGT_X86::codeGen(DFLeafNode* N) {
// by design of DFG2LLVM_NVPTX backend
assert(!(N->hasX86GenFuncForTarget(visc::GPU_TARGET)) && "");
break;
- case visc::SPIR_TARGET:
- // A leaf node should not have an x86 function for SPIR
- // by design of DFG2LLVM_SPIR backend
- assert(!(N->hasX86GenFuncForTarget(visc::SPIR_TARGET)) && "");
- break;
default:
break;
}
--
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