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Simulating trees for phydl

Nulling Algorithms for Antenna Arrays

ECE527 Final Project: Babel SoC

A Xilinx HLS DNN accelerator based on Winograd algorithm and systolic array.

Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

Building components for 3D Engine for Visualization using WegGL and/or Three.js